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xv6: a simple, Unix-like teaching operating system.

Foreword and acknowledgements


  1. An open standard instruction set architecture (ISA)
  2. Open source
  3. A RISC architecture, a load–store architecture;


XV6 is a Linux example kernel, re-implementation.

Understanding xv6 is a good start toward understanding any of these systems and many others.


In computer engineering, a load–store architecture is an instruction set architecture that divides instructions into two categories: memory access (load and store between memory and registers[1]) and ALU operations (which only occur between registers).

关于寄存器:寄存器可以分为 Processor register 和 Register, 前者是在 CPU 核内,后者是在 CPU 核外,核外寄存器通过地址访问。


Program CounterPCA program counter keeps track of the next instruction to be executed.主要记录下一条要执行的指令
Instruction RegisterIRInstruction Register is a register which holds the instruction to be decoded by the control unit.记录控制单元解码的指定
Memory Address RegisterMARMemory Address Register is a register which points to the memory location which the CPU plans to access, either for reading or writing.指向 CPU 要访问的存储位置
Memory Buffer RegisterMBRwhich is also referred to as the memory data register (MDR) is used for storage data either for coming to the CPU or data being transferred by the CPU.存储进入 CPU 的数据或者是被 CPU 传输的数据
AccumulatorACCa general purpose used for strong variables, temporary results and results produced by arithmetic logic until of the CPU.累加器

寄存器的 size:一般寄存器由的数量由其可以承载的 bits 数量来衡量,如 32-bit 寄存器、64-bit 寄存器等。

GPU 上的寄存器远远多于 CPU 上寄存器的数量。

Operation System Interfaces


  1. 在多个程序之间共享一台计算机;
  2. 管理底层硬件;在多个程序之间共享硬件,使得我们感知程序是在同一时间运行;
  3. 提供程序之间的交互、共享数据或者协同工作。



  1. Processor registeropen in new window, 寄存器;Processor register 为处理器寄存器。 ↩︎